The PE-APB is used to connect low speed peripheral in AMBA bus system. This IP also support to configure read-only memory space. The contents of memory are protected from changes.
- The PE-APB includes the following features:
- Compliance with the AMBA Specification, Revision 2.0 from ARM.
- AHB slave
- Support for the following:
- Up to 16 APB slaves
- 32, 64, 128, and 256-bit AHB data buses
- 8, 16, and 32-bit APB data buses
- Single and burst AHB transfers
- Synchronous hclk/pclk; hclk is an integer multiple of pclk
- Big- and little-endian AHB systems
- Little-endian/Big-endian APB slave
- Read/Write on separate buses
- Configurable address bus width greater than 1KB and lower than APB bus address range, maximum 32 bit.
- Valid pready detection for APB slave
Performance (FIFO_DEDTH = 16)
|Cyclone II: EP2C35F672C6||273||126||171.26MHz||0|
|Cyclone III: EP3C40F780C6||273||126||198.97MHz||0|
|Stratix II: EP2S60F672C3||151||126||270.05MHz||0|
|Stratix III: EP3SL150F1152C2||153||126||447.43MHz||0|
- RTL Code
- Verification (Source Code)